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19-1627; Rev 2; 6/03
DBS Direct Downconverter
General Description
The MAX2106 low-cost, direct-conversion tuner IC is designed for use in digital direct-broadcast satellite (DBS) television set-top box units and is a pin-for-pin upgrade for the MAX2104. Its direct-conversion architecture reduces system cost compared to devices with IF-based architectures. The MAX2106 directly tunes Lband signals to baseband using a broadband I/Q downconverter. The operating frequency range spans 925MHz to 2175MHz. The IC includes a low-noise amplifier (LNA) with gain control, I and Q downconverting mixers, lowpass filters with gain and frequency control, a local oscillator (LO) buffer with a 90 quadrature network, and a chargepump-based phase-locked loop (PLL) for frequency control. The MAX2106 has an on-chip LO, requiring only an external varactor-tuned LC tank for operation. The LO's output drives the internal quadrature generator and has a buffer amplifier to drive off-chip circuitry. The MAX2106 comes in a 48-pin thin quad flat-pack package with exposed paddle (EP).
Advantages Over MAX2104
o Improved Front End Achieves 10.2dB NF at 1550MHz o Higher Input IIP3: 11.5dBm at 1550MHz o Reduced Spurious Downconversion Products o Capable of Using an External Synthesizer
MAX2106
Features
o Drop-In Replacement for MAX2104 Designs: Requires Only Minor Software Upgrade and Two External Resistor Value Changes o Complete Low-Cost Solution for DBS Direct Downconversion o High Level of Integration Minimizes Component Count o 1MBaud to 45MBaud Operation o Selectable LO Buffer o +5V Single-Supply Operation o 925MHz to 2175MHz Input Frequency Range o On-Chip Quadrature Generator, Dual-Modulus Prescaler (/32, /33) o On-Chip Crystal Oscillator Amplifier o PLL Phase Detector with Gain-Controlled Charge Pump o Input Levels: -25dBm to -68dBm per Carrier o Over 50dB Gain Control Range o Noise Figure = 10.2dB; IIP3 = +11.5dBm (at 1550MHz) o Automatic Baseband Offset Correction
Applications
U.S. DSS Set-Top Receivers European DVB-Compliant Systems Cellular Base Stations Wireless Local Loop Broadband Systems LMDS Professional Receivers VSAT Microwave Links
Pin Configuration
TOP VIEW
CP FB GND VCC TANK+ VRLO TANKGND GND VCC LOBUF-/TPSOUTLOBUF+/FPSOUT+
48 47 46 45 44 43 42 41 40 39 38 37
VCC CFLT XTLXTL+ GND VCC RFINRFIN+ GND GND QDCQDC+
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
36 35 34 33 32 31 30 29 28 27 26 25
PLLINPLLIN+ MODMOD+ LODIVSEL IOUT+ IOUTVCC QOUT+ QOUTRFBAND FLCLK
Ordering Information
PART MAX2106UCM *Exposed paddle. TEMP RANGE 0C to +85C PIN-PACKAGE 48 TQFP-EP*
MAX2106
Functional Diagram appears at end of data sheet.
IDCIDC+ LOBUFSEL GND RFOUT CPG1 VCC XTLOUT CPG2 GC1 GC2 INSEL
TQFP
________________________________________________________________ Maxim Integrated Products
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DBS Direct Downconverter MAX2106
ABSOLUTE MAXIMUM RATINGS
VCC to GND ..............................................................-0.3V to +7V All Other Pins to GND................................-0.3V to (VCC + 0.3V) RFIN+ to RFIN-, TANK+ to TANK-, IDC+ to IDC-, QDC+ to QDC- .........................................2V IOUT_, QOUT_ to GND Short-Circuit Duration .......................10s LOBUF+/PSOUT+, LOBUF-/PSOUT- Short-Circuit Duration..10s Continuous Current (any pin other than VCC or GND)........20mA Continuous Power Dissipation (TA = +70C) 48-Pin TQFP-EP (derate 27mW/C above +70C) ..........1.5W Operating Temperature ..........................................0C to +85C Junction Temperature ......................................................+150C Storage Temperature Range .............................-65C to +150C Lead Temperature (soldering, 10s) .................................+300C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
DC ELECTRICAL CHARACTERISTICS
(VCC = +4.75V to +5.25V, VFB = +2.4V, CIOUT_ = CQOUT_ = 10pF, FLCLK = 2MHz, RFIN_ = unconnected, RIOUT_ = RQOUT_ = 10k, VLOBUFSEL = 0.5V, VRFBAND = VINSEL = VCPG1 = VCPG2 = +2.4V, VPLLIN+ = VMOD+ = +1.3V, VPLLIN- = VMOD- = +1.1V, TA = +25C, unless otherwise noted. Typical values are at VCC = +5V, unless otherwise noted.) PARAMETER Operating Supply Voltage Operating Supply Current Input Voltage High Input Voltage Low Input Current RFBAND Input Current SLEW-RATE-LIMITED DIGITAL INPUT (fLCLK) FLCLK Input Voltage High FLCLK Input Voltage Low FLCLK Input Current (Note 1) Common-Mode Input Voltage Input Voltage Low Input Voltage High Input Current (Note 1) DIFFERENTIAL DIGITAL OUTPUTS (LOBUF+/PSOUT+, LOBUF-/PSOUT-) Common-Mode Output Voltage Output Voltage Low (Note 2) Output Voltage High (Note 2) FREQUENCY SYNTHESIZER/LO BUFFER (VMOD+ - VMOD-) 200mV, LOBUFSEL 0.5V Prescaler Ratio (VMOD+ - VMOD-) -200mV, LOBUFSEL 0.5V LOBUFSEL 2.4V, LODIVSEL 0.5V LOBUFSEL 2.4V, LODIVSEL 2.4V Reference Divider Ratio XTLOUT Output DC Voltage VCPG1 0.5V, VCPG2 0.5V Charge-Pump Output High Measured at FB VCPG1 0.5V, VCPG2 2.4V VCPG1 2.4V, VCPG2 0.5V VCPG1 2.4V, VCPG2 2.4V 2 0.08 0.24 0.48 1.44 32 33 2 1 8 1.9 0.1 0.3 0.6 1.8 0.12 0.36 0.72 2.16 mA 32 33 2 1 8 V VCMO Referenced to VCMO, LOBUFSEL 0.5V Referenced to VCMO, LOBUFSEL 0.5V 150 2.16 2.4 2.64 -150 V mV mV VCMI Referenced to VCMI Referenced to VCMI 100 -5 5 RSOURCE = 50k, VFLCLK = 1.65V -1 1.08 1.2 DIFFERENTIAL DIGITAL INPUTS (MOD+, MOD-, PLLIN+, PLLIN-) 1.32 -100 V mV mV A 1.85 1.45 1 V V A SYMBOL VCC ICC VIH VIL IIN -15 -200 2.4 0.5 10 200 CONDITIONS MIN 4.75 195 TYP MAX 5.25 275 UNITS V mA V V A A
STANDARD DIGITAL INPUTS (INSEL, CPG1, CPG2, LOBUFSEL, LODIVSEL)
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DBS Direct Downconverter
DC ELECTRICAL CHARACTERISTICS (continued)
(VCC = +4.75V to +5.25V, VFB = +2.4V, CIOUT_ = CQOUT_ = 10pF, FLCLK = 2MHz, RFIN_ = unconnected, RIOUT_ = RQOUT_ = 10k, VLOBUFSEL = 0.5V, VRFBAND = VINSEL = VCPG1 = VCPG2 = +2.4V, VPLLIN+ = VMOD+ = +1.3V, VPLLIN- = VMOD- = +1.1V, TA = +25C, unless otherwise noted. Typical values are at VCC = +5V, unless otherwise noted.) PARAMETER Charge-Pump Output Low Measured at FB Charge-Pump Output Current Matching Positive to Negative Charge-Pump Output Leakage Charge-Pump Output Current Drive (Note 1) ANALOG CONTROL INPUTS (GC1, GC2) Input Current Differential Output Voltage Swing Common-Mode Output Voltage (Note 1) Offset Voltage (Note 1) IGC_ VGC_ = 1V to 4V -50 50 A BASEBAND OUTPUTS (IOUT+, IOUT-, QOUT+, QOUT-) RL = 2k differential 1 0.65 -50 0.85 50 Vp-p V mV SYMBOL CONDITIONS VCPG1 0.5V, VCPG2 0.5V VCPG1 0.5V, VCPG2 2.4V VCPG1 2.4V, VCPG2 0.5V VCPG1 2.4V, VCPG2 2.4V Measured at FB Measured at FB Measured at CP MIN -0.12 -0.36 -0.72 -2.16 -5 -25 100 TYP -0.1 -0.3 -0.6 -1.8 MAX -0.08 -0.24 -0.48 -1.44 5 25 UNITS
MAX2106
mA
% nA A
AC ELECTRICAL CHARACTERISTICS
(IC driven single-ended with RFIN- AC-terminated in 75 to GND, VCC = +4.75V to +5.25V, VIOUT_ = VQOUT_ = 0.59Vp-p, CIOUT_ = CQOUT_ = 10pF, LCLK = 2MHz, RIOUT_ = RQOUT_ = 10k, VLOBUFSEL = 0.5V, VRFBAND = VINSEL = VCPG1 = VCPG2 = +2.4V, VPLLIN+ = VMOD+ = +1.3V, VPLLIN- = VMOD- = +1.1V, TA = +25C, unless otherwise noted. Typical values are at VCC = +5V.) PARAMETER RF FRONT END RFIN_ Input Frequency Range RFIN_ Input Power for 0.59Vp-p Baseband Levels fRFIN_ Inferred by quadrature gain and phase-error test VGC1 = VGC2 = +4V (min gain) VGC1 = VGC2 = +1V (max gain) fLO = 2175MHz PRFIN_ = -25dBm fLO = 1550MHz per tone fLO = 950MHz fLO = 2175MHz PRFIN_ = -65dBm fLO = 1550MHz per tone fLO = 950MHz Single carrier PRFIN_ = -25dBm per tone, fLO = 951MHz PRFIN_ = -40dBm, signals within filter bandwidth fRFIN_ = 1550MHz, VGC1 = 1V, VGC2 adjusted 0.59Vp-p baseband level PRFIN_ = -65dBm PRFIN_ = -25dBm 925 -25 -68 10.5 11.5 10.5 -29 -26 -30 17 2 10.2 44.8 2175 MHz dBm dBm dBm SYMBOL CONDITIONS MIN TYP MAX UNITS
RFIN_ Input Third-Order Intercept Point (Note 3)
IP3RFIN_
dBm
RFIN_ Input Second-Order Intercept (Note 4) Output-Referred 1dB Compression Point (Note 5)
IP2RFIN_ P1dBOUT
dBm dBV dB dB 3
Noise Figure
NF
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DBS Direct Downconverter MAX2106
AC ELECTRICAL CHARACTERISTICS (continued)
(RFIN+ IC driven single-ended with RFIN- AC-terminated in 75 to GND, VCC = +4.75V to +5.25V, VIOUT_ = VQOUT_ = 0.59Vp-p, CIOUT_ = CQOUT_ = 10pF, fLCLK = 2MHz, RIOUT_ = RQOUT_ = 10k, VLOBUFSEL = 0.5V, VRFBAND = VINSEL = VCPG1 = VCPG2 = +2.4V, VPLLIN+ = VMOD+ = +1.3V, VPLLIN- = VMOD- = +1.1V, TA = +25C, unless otherwise noted. Typical values are at VCC = +5V.) PARAMETER RFIN+ Return Loss (Note 6) LO 2nd Harmonic Rejection (Note 7) LO Half Harmonic Rejection (Note 8) LO Leakage Power (Notes 6, 9) RFOUT PORT (LOOPTHROUGH) f = 925MHz RFIN+ to RFOUT Gain (Note 10) f = 1550MHz f = 2175MHz f = 925MHz RFOUT Output Third-Order Intercept Point (Note 10) f = 1550MHz f = 2175MHz f = 925MHz RFOUT Noise Figure (Note 10) RFOUT Return Loss (Notes 6, 10) BASEBAND CIRCUITS Output Real Impedance (Note 1) Baseband Highpass -3dB Frequency (Note 1) LPF -3dB Cutoff-Frequency Range (Note 1) Baseband Frequency Response (Note 1) LPF -3dB Cutoff-Frequency Accuracy (Note 1) Ratio of In-Filter-Band to Out-of-FilterBand Noise Quadrature Gain Error Quadrature Phase Error IOUT_, QOUT_ CIDC_ = CQDC_ = 0.22F Controlled by FLCLK signal Deviation from ideal 7th order, Butterworth, up to 0.7 x fC fFLCLK = 0.5MHz, fC = 8MHz fFLCLK = 1.25MHz, fC = 19.3MHz fFLCLK = 2.0625MHz, fC = 31.4MHz fIN_BAND = 100Hz to 22.5MHz, fOUT_BAND = 67.5MHz to 112.5MHz Includes effects from baseband filters, measured at 125kHz baseband Includes effects from baseband filters, measured at 125kHz baseband 8 -0.5 -5.5 -10 10 23 1.2 4 50 750 33 0.5 5.5 10 10 dB dB degrees % Hz MHz dB f = 1550MHz f = 2175MHz 925MHz < f < 2175MHz, ZLOAD = 75 0.5 1.0 2.0 9 7 5 12.5 11 11 12 dB dB dBm dB SYMBOL CONDITIONS fRFIN_ = 925MHz, ZSOURCE = 75 fRFIN_ = 2175MHz, ZSOURCE = 75 Average level of VIOUT_, VQOUT_ Average level of VIOUT_, VQOUT_ Measured at RFIN+ MIN TYP +13 +14 32 41.5 -66 MAX UNITS dB dB dB dBm
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DBS Direct Downconverter
AC ELECTRICAL CHARACTERISTICS (continued)
(IC driven single-ended with RFIN- AC-terminated in 75 to GND, VCC = +4.75V to +5.25V, VIOUT_ = VQOUT_ = 0.59Vp-p, CIOUT_ = CQOUT_ = 10pF, LCLK = 2MHz, RIOUT_ = RQOUT_ = 10k, VLOBUFSEL = 0.5V, VRFBAND = VINSEL = VCPG1 = VCPG2 = +2.4V, VPLLIN+ = VMOD+ = +1.3V, VPLLIN- = VMOD- = +1.1V, TA = +25C, unless otherwise noted. Typical values are at VCC = +5V.) PARAMETER SYNTHESIZER SYNTHESIZER XTLOUT Output Voltage Swing Crystal Frequency Range (Note 1) MOD+, MOD- Setup Time (Note 1) MOD+, MOD- Hold Time (Note 1) LOCAL OSCILLATOR LOCAL OSCILLATOR LO Tuning Range (Note 11) LO Buffer Output Voltage (Note 1) VLOBUFSEL 2.4V, fLO = 925 MHz + 2175MHz At 1kHz offset, fLO = 2175MHz LO Phase Noise (Notes 6, 12) At 10kHz offset, fLO = 2175MHz At 100kHz offset, fLO = 2175MHz RFIN+ to LO Input Isolation (Note 9) Note 1: Note 2 Note 3: fRFIN = 2175MHz 590 70 -60 -75 -96 58 dB dBc/Hz 1180 MHz VRMS tSUM tHM Figure 1 Figure 1 Load = 10pF | | 10k, fXTLOUT = 6MHz 0.75 4 7 0 1 1.5 7.26 Vp-p MHz ns ns SYMBOL CONDITIONS MIN TYP MAX UNITS
MAX2106
Minimum and maximum values are guaranteed by design and characterization over supply voltage. Driving differential load of 10k || 15pF. Two signals are applied to RFIN_ at fLO - 100MHz and fLO - 199MHz. VGC2 = 1V, VGC1 is set so that the baseband outputs are at 590mVp-p. IM products are measured at baseband outputs but are referred to RF inputs. Note 4: Two signals are applied to RFIN_ at 1200MHz and 2150MHz. VGC2 = 1V, VGC1 is set so that the baseband outputs are at 590mVp-p. IM products are measured at baseband outputs but are referred to RF inputs. Note 5: PRFIN_ = -40dBm so that front-end IM contributions are minimized. Note 6: Using L64733/L64734 demo board from LSI Logic. Note 7: Downconverted level, in dBc, of carrier present at fLO x 2, fLO = 1180MHz, fVCO = 590MHz, VRFBAND = unconnected (see histogram plots). Note 8: Downconverted level, in dBc, of carrier present at fO / 2, fLO = 2175MHz, fVCO = 1087.5MHz, VRFBAND = 2.4V. Note 9: Leakage is dominated by board parasitics. Note 10: VCPG1 = VCPG2 = VRFBAND = VINSEL = 0.5V, LCLK = 0.5MHz. Note 11: Guaranteed by design and characterization over supply and temperature. Note 12: Measured at tuned frequency with PLL locked. PLL loop bandwidth = 3kHz. All phase noise measurements assume tank components have a Q > 50.
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DBS Direct Downconverter MAX2106
Pin Description
PIN 1, 6, 19, 29, 39, 45 2 3 4 5, 9, 10, 16, 40, 41, 46 7 8 11 12 13 14 15 17 18 20 21 22 23 24 25 26 27 28 30 31 32 33 NAME VCC CFLT XTLXTL+ GND RFINRFIN+ QDCQDC+ IDCIDC+ LOBUFSEL RFOUT CPG1 XTLOUT CPG2 GC1 GC2 INSEL FLCLK RFBAND QOUTQOUT+ IOUTIOUT+ LODIVSEL MOD+ FUNCTION VCC Power-Supply Input. Connect each pin to a +5V 5% low-noise supply. Bypass each VCC pin to the nearest GND with a ceramic chip capacitor. External Bypass for Internal Bias. Bypass this pin with a 0.1F ceramic chip capacitor to GND. Inverting Input to Crystal Oscillator. Consult crystal manufacturer for circuit loading requirements. Noninverting Input to Crystal Oscillator. Consult crystal manufacturer for circuit loading requirements. Ground. Connect each of these pins to a solid ground plane. Use multiple vias to reduce inductance where possible. RF Inverting Input. Bypass RFIN- with 47pF capacitor in series with a 75 resistor to GND. RF Noninverting Input. Connect to 75 source with a 47pF ceramic chip capacitor. Baseband Offset Correction. Connect a 0.22F ceramic chip capacitor from QDC- to QDC+ (pin 12). Baseband Offset Correction. Connect a 0.22F ceramic chip capacitor from QDC+ to QDC- (pin 11). Baseband Offset Correction. Connect a 0.22F ceramic chip capacitor from IDC- to IDC+ (pin 14). Baseband Offset Correction. Connect a 0.22F ceramic chip capacitor from IDC+ to IDC- (pin 13). Local Oscillator Buffer Select. Connect to GND to select DIV32/33 prescaler output; connect VCC to DIV1 to select DIV2 LO buffer output. Buffered RF Output. Enabled when INSEL is low. Charge-Pump Gain Select. High-impedance digital input. Sets the charge-pump output scaling. See DC Electrical Characteristics for available gain settings. Buffered Crystal Oscillator Output Charge-Pump Gain Select. High-impedance digital input. Sets the charge-pump output scaling. See DC Electrical Characteristics for available gain settings. Gain Control Input for RF Front End. High-impedance analog input, with an input range of +1V to +4V. See AC Electrical Characteristics for transfer function. Gain Control Input for Baseband Signals. High-impedance analog input, with an input range of +1V to +4V. See AC Electrical Characteristics for transfer function. Loopthrough Mode Enable. High-impedance digital input. Drive low to enable the RFOUT buffer and disable the LO converters. Drive high for normal tuner operation. Baseband Filter Cutoff Adjust. Connect to a slew-rate-limited clock source. See AC Electrical Characteristics for transfer function. RF Input Band Select Input. Drive high to enable 1680 MHz to 2175 MHz band. Leave unconnected to enable 1180 MHz to 1680 MHz band. Connect to GND to enable 925 MHz to 1180 MHz band. Baseband Quadrature Output. Connect to inverting input of high-speed ADC. Baseband Quadrature Output. Connect to noninverting input of high-speed ADC. Baseband In-Phase Output. Connect to inverting input of high-speed ADC. Baseband In-Phase Output. Connect to noninverting input of high-speed ADC. LO Buffer Divider Ratio Input. Drive high to enable divide-by-one LO buffer output. Connect to GND to enable divide-by-two buffer output. PECL Modulus Control. A PECL high on MOD+ sets the dual-modulus prescaler to divide by 32. A PECL logic low sets the divide ratio to 33. Drive with a differential PECL signal in conjunction with MOD- (pin 34).
6
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DBS Direct Downconverter
Pin Description (continued)
PIN 34 35 36 37 NAME MODPLLIN+ PLLINLOBUF+/ PSOUT+ LOBUF-/ PSOUTTANKVRLO TANK+ FB CP FUNCTION PECL Modulus Control. A PECL low on MOD- sets the dual-modulus prescaler to divide by 32. A PECL logic high sets the divide ratio to 33. Drive with a differential PECL signal in conjunction with MOD+ (pin 33). PECL Phase-Locked Loop Input. Drive with a differential PECL signal in conjunction with PLLIN- (pin 36). PECL Phase-Locked Loop Input. Drive with a differential PECL signal in conjunction with PLLIN+ (pin 35) LOBUFSEL = GND: PECL Prescaler Output. Differential output of the dual-modulus prescaler. Used in conjunction with PSOUT-. Requires PECL-compatible termination. LOBUFSEL=VCC: 50 LO buffer noninverting output. LOBUFSEL = GND: PECL Prescaler Output. Differential output of the dual-modulus prescaler. Used in conjunction with PSOUT+. Requires PECL-compatible termination. LOBUFSEL = VCC: 50 LO buffer inverting output. LO Tank Oscillator Input. Connect to an external LC tank with varactor tuning. LO Internal Regulator. Bypass with a 1000pF ceramic chip capacitor to GND. LO Tank Oscillator Input. Connect to an external LC tank with varactor tuning. Feedback Input for Loop Filter Voltage Drive Output. Control of external charge-pump transistor.
MAX2106
38 42 43 44 47 48
MOD+, MOD-
50%
50%
tSUM PSOUT+ PSOUT-
tHM 50% 50%
Figure 1. Modulus Control Timing Diagram
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DBS Direct Downconverter MAX2106
Functional Diagram
CPG1 CPG2 PLLIN+ PLLINXTL+ XTLLODIVSEL MOD+ MODRFBAND TANK+ x2 TANKVCC VRLO CFLT GND RFIN+ RFINGC1 GC2 FLCLK 90 VOLTAGE REGULATOR /32, 33 1, 2 /8
MAX2106 CHARGE PUMP CP FB XTLOUT LOBUFSEL LOBUF+/PSOUT+ LOBUF-/PSOUTBASEBAND OFFSET CORRECTION IDC+ IDCQDC+ QDCIOUT+ IOUT-
QOUT+ QOUT-
RFOUT INSEL
8
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DBS Direct Downconverter
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.)
MAX2106
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48L,TQFP.EPS
9
DBS Direct Downconverter MAX2106
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.)
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
10 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 (c) 2003 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.

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